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研究人才詳細資料


出版年月 著作類別 著作名稱 作者 收錄出處
2024-01 期刊論文 A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN) Yuan-Ho Chen, Szi-Wen Chen*, Hong-Wen Jian, Shinn-Yn Lin, and Rou-Shayn Chen IEEE Access
2024- 期刊論文 VLSI Implementation of an Annealing Accelerator for Solving Combinatorial Optimization Problems Yuan-Ho Chen, Hsin-Tung Hua, Chin-Fu Nien*, and Shinn-Yn Lin IEEE Nanotechnology Magazine
2023-10 期刊論文 Artificial Intelligence Chip Design for High-Speed Cardiac Arrhythmia Classification Yuan-Ho Chen, Ching-Tien Wang, Shinn-Yn Lin, Chao-Sung Lai*, and Bing Sheu IEEE Nanotechnology Magazine
2022-12 期刊論文 VLSI Implementation of QRS Complex Detector Based on Wavelet Decomposition Yuan-Ho Chen, Chih-Wen Lu*, Szi-Wen Chen*, Ming-Han Tsai, Shinn-Yn Lin, and Rou-Shayn Chen IEEE Access
2022-05 期刊論文 VLSI Implementation of Premature Ventricular Complex Abnormal Heartbeat Detection Using a Convolutional Neural Network Yuan-Ho Chen* and Hsin-Tung Hua J. Circuits Syst. Comput.
2022-03 期刊論文 A VLSI Chip for the Abnormal Heart Beat Detection Using Convolutional Neural Network Yuan-Ho Chen, Szi-Wen Chen*, Pei-Jung Chang, Hsin-Tung Hua, Shinn-Yn Lin, and Rou-Shayn Chen Sensors
2021-04 期刊論文 Simple and Hardware-efficient Row-based Direct-Mapping Estimators in Fixed-width Modified Booth Multipliers Chung-Yi Li, Yuan-Ho Chen*, Lu-An Lai, Wen-Chi Yeh, and Jun Yang International Journal of Circuit Theory and Applications
2021-03 期刊論文 Improvement of Accuracy of Fixed-Width Booth Multipliers Using Data Scaling Technology Yuan-Ho Chen IEEE Transactions on Circuits and Systems - II: Express Briefs
2020-12 期刊論文 Low-Cost Implementation of Independent Component Analysis for Biomedical Signal Separation Using Very-Large-Scale Integration Yuan-Ho Chen* and Shun-Ping Wang IEEE Transactions on Circuits and Systems - II: Express Briefs
2020-04 期刊論文 A VLSI Implementation of Independent Component Analysis (ICA) for Biomedical Signal Separation Using CORDIC Engine Yuan-Ho Chen, Szi-Wen Chen*, and Min-Xian Wei IEEE Transactions on Biomedical Circuits and Systems
2020-03 期刊論文 Dual-Mode FPGA-Based Triple-TDC With Real-Time Calibration and a Triple Modular Redundancy Scheme Yuan-Ho Chen* Electronics
2020-03 期刊論文 Very-large-scale integration implementation of a convolutional neural network accelerator for abnormal heartbeat detection Yuan-Ho Chen* and Yen Juan Electronics Letters
2019-10 期刊論文 Cost-Effective Multi-Standard Video Transform Core Using Time-Sharing Architecture Yun-Hua Tseng and Yuan-Ho Chen* EURASIP Journal on Advances in Signal Processing
2019-09 期刊論文 Area-Efficient FFT Kernel with Improved Use of GI for Multistandard MIMO-OFDM Applications Song-Nien Tang* and Yuan-Ho Chen* Applied Sciences
2019-07 期刊論文 VLSI implementation of a cost-efficient 3-lead lossless ECG compressor and decompressor Yuan-Ho Chen*, Yun-Hua Tseng, Pao-Hsien Chu, Yen Juan, Shun-Ping Wang Circuits, Systems, and Signal Processing
2019-01 期刊論文 Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array–Based Time-to-Digital Converters with Real-Time Calibration Yuan-Ho Chen* Applied Sciences
2018-11 期刊論文 Multiple Leads With a Switch Mode for Lossless and Lossy Compression by Using Very Large Scale Integration Technology Yun-Hua Tseng, Yuan-Ho Chen* and Chih-Wen Lu* IEEE Access
2018-11 期刊論文 Very-Large-Scale Integration Implementation of the Integral Pulse Frequency Modulation Model for Spectral Estimation of Heart Rate Variability Yuan-Ho Chen, Szi-Wen Chen*, and Yu Juan Electronics Letters
2018-09 期刊論文 Run-Time Calibration Scheme for the Implementation of a Robust Field-Programmable-Gate-Array-Based Time-to-Digital Converter Yuan-Ho Chen International Journal of Circuit Theory and Applications
2017-12 期刊論文 High Throughput Video Transform Architecture for High Efficiency Video Coding (HEVC) Yuan-Ho Chen* and Yi-Fan Ko International Journal of Circuit Theory and Applications
2017-10 期刊論文 Adaptive Integration of the Compressed Algorithm of CS and NPC for the ECG Signal Compressed Algorithm in VLSI Implementation Yun-Hua Tseng, Yuan-Ho Chen* and Chih-Wen Lu* Sensors
2017-10 期刊論文 Fine-tuning accuracy using conditional probability of the bottom sign-bit in Fixed-width Modified Booth Multiplier Yuan-Ho Chen, Chung-Yi Li* and Lu-An Lai Circuits, Systems, and Signal Processing
2017-05 期刊論文 A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter Yuan-Ho Chen Nuclear Instruments and Methods in Physics Research Section A
2016-11 期刊論文 Low-cost Multi-standard Video Transform Core Using Time-distribution Scheme Yuan-Ho Chen* and Yun-Hua Tseng Electronics Letters
2016-08 期刊論文 Dynamic Error-compensated Fixed-Width Booth Multiplier Based on Conditional-Probability of Input Series Wen-Quan He, Yuan-Ho Chen*, and Shyh-Jye Jou Circuits, Systems, and Signal Processing
2016-08 期刊論文 Low-cost Multi-Standard Simultaneous Forward and Inverse Video Transform Core Yun-Hua Tseng, Yuan-Ho Chen*, Tze-Yang Kao, and Chih-Wen Lu International Journal of Circuit Theory and Applications
2016-05 研討會論文 Cost-Effective Multi-Standard Video Transform Core Using Time-Sharing Architecture Yun-Hua Tseng, Yuan-Ho Chen*, and Chih-Wen Lu
2016-02 研討會論文 A High Resolution FPGA-based Weighted Delay Line TDC with Nonlinearity Calibration Yuan-Ho Chen
2015-12 期刊論文 A 10-Bit Low-Power High-Color-Depth Column Driver with Two-Stage Multi-Channel RDACs for Small-Format TFT-LCD Driver ICs Ping-Yeh Yin, Chih-Wen Lu*, Yuan-Ho Chen, Hsin-Chin Liang, and Sheng-Pin Tseng IEEE Journal of Display Technology
2015-10 期刊論文 Hardware Design and Implementation of a Wavelet De-noising Procedure for Medical Signal Preprocessing Szi-Wen Chen* and Yuan-Ho Chen Sensors
2015-08 期刊論文 Area-Efficient Fixed-Width Squarer with Dynamic Error-Compensation Circuit Yuan-Ho Chen* IEEE Transactions on Circuits and Systems - II: Express Briefs
2015-08 期刊論文 High-Accuracy Fixed-Width Booth Multipliers Based on Probability and Simulation Wen-Quan He, Yuan-Ho Chen*, and Shyh-Jye Jou IEEE Transactions on Circuits and Systems - I: Regular Papers
2015-08 研討會論文 A High Throughput Video Transform Architecture for High Efficiency Video Coding (HEVC) Applications Yi-Fan Ko, Chieh-Yang Liua, and Yuan-Ho Chen*
2015-07 期刊論文 Area-efficiency Video Transform for HEVC Applications Yuan-Ho Chen* and Chieh-Yang Liu Electronics Letters
2015-01 期刊論文 An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability Yuan-Ho Chen* IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2014-11 期刊論文 A High-Throughput and Area-Efficient Video Transform Core with a Time Division Strategy Yuan-Ho Chen*, Ruei-Yuan Jou, Tsin-Yuan Chang, and Chih-Wen Lu IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2014-08 期刊論文 Hardware-Efficient Multi-Standard Video Transform Core Yuan-Ho Chen* and Hsiao-Tzu Liu Journal of Circuits, Systems, and Computers
2014-05 期刊論文 A Multi-stage Fault-tolerant Multiplier with Triple Module Redundancy (TMR) Technique Yuan-Ho Chen*, Chih-Wen Lu, Shian-Shing Shyu, Chung-Lin Lee, Ting-Chia Ou Journal of Circuits, Systems, and Computers
2014-05 期刊論文 Low-cost fixed-width squarer by using a probability-compensated circuit Yuan-Ho Chen* Electronics Letters
2014-04 研討會論文 A High Accuracy Fixed-width Booth Multiplier Using Select Probability Estimation Bias Wen-Quan He, Chieh-Yang Liu, Wei-Yi Liu, Yuan-Ho Chen*
2014-04 研討會論文 Low-Cost Video Transform for HEVC Chieh-Yang Liu, Wen-Quan He, Yung-Ming Chang, Yuan-Ho Chen*
2014-03 期刊論文 A High-Throughput Multistandard Transform Core Supporting MPEG/H.264/VC-1 Using Common Sharing Distributed Arithmetic Yuan-Ho Chen*, Jyun-Neng Chen, Tsin-Yuan Chang, Chih-Wen Lu IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2013-12 研討會論文 A Low-Cost FFT Processor for DVB-T Application Yong-Ming Chang, Wen-Quan He, and Yuan-Ho Chen*
2013-08 研討會論文 High-Throughput VLSI FFT Architecture With Systolic Array Wen-Ch’uan Ho, Yong-Ming Chang, Yuan-Ho Chen*
2013-05 研討會論文 A High Resolution FPGA-Based Merged Delay Line TDC with Nonlinearity Calibration Yuan-Ho Chen*
2013-01 研討會論文 A Multi-Stage Fault-Tolerant Multiplier with Triple Module Redundancy (TMR) Technique Ping-Yeh Yin, Yuan-Ho Chen, Chih-Wen Lu, Shian-Shing Shyu, Chung-Lin Lee, Ting-Chia Ou, Yo-Sheng Lin
2012-07 研討會論文 A High Resolution FPGA-based TDC with Nonlinearity Calibration Yuan-Ho Chen, Chih-Wen Lu*, Tsin-Yuan Chang, Chin Hsia
2012-07 研討會論文 A Low Noise Amplifier Employing Noise Canceling Technique for Ultrasound System Applications Jian-Shou Chen, Chih-Wen Lu*, Chin Hsia, Yuan-Ho Chen
2012-07 研討會論文 A Low-Error Statistical Fixed-Width Multiplier and Its Applications Yuan-Ho Chen, Chih-Wen Lu*, Hsin-Chen Chiang, Tsin-Yuan Chang, Chin Hsia
2012-05 研討會論文 High Accuracy Fixed-width Booth Multipliers with Probabilistic Estimation Compensated Method Yuan-Ho Chen, Hsin-Chen Chiang, Tsin-Yuan Chang, Chih-Wen Lu*, Pei-Yi Lai Li
2012-04 期刊論文 A High Performance Video Transform Engine by Using Space-Time Scheduling Strategy Yuan-Ho Chen*, Tsin-Yuan Chang IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2012-03 期刊論文 A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-width Booth Multipliers Yuan-Ho Chen*, Tsin-Yuan Chang IEEE Transactions on Circuits and Systems - I: Regular Papers
2012-02 期刊論文 Period Extension and Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG Chung-Yi Li*, Yuan-Ho Chen, Tsin-Yuan Chang, Lih-Yuan Deng, Kiwing To IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2011-12 研討會論文 A Low-Cost and High-Throughput Architecture for H.264/AVC Integer Transform by Using Four Computation Streams Yuan-Ho Chen*, Tsin-Yuan Chang, Chih-Wen Lu
2011-09 期刊論文 Area-Effective and Power-Efficient Fixed-Width Booth Multipliers Using Generalized Probabilistic Estimation Bias Yuan-Ho Chen*, Tsin-Yuan Chang, Chung-Yi Li IEEE Journal on Emerging and Selected Topics in Circuits and Systems
2011-08 研討會論文 A High Performance Video Transform Engine by Using Simultaneous Forward and Inverse DCT Ruei-Yuan Jou, Yuan-Ho Chen*, Tze-Yang Kao, Tsin-Yuan Chang
2011-08 研討會論文 A Low-cost Architecture for High-throughput Multi-path Transform in Video Compression Applications Yuan-Ho Chen*, Tsin-Yuan Chang
2011-08 研討會論文 Low-Error Fixed-Width Two’s-complement Multipliers with Statistical compensation Circuit Hsin-Chen Chiang, Yuan-Ho Chen*, Tsin-Yuan Chang
2011-04 期刊論文 A Probabilistic Estimation Bias Circuit for Fixed-Width Booth Multiplier and Its DCT Applications Chung-Yi Li*, Yuan-Ho Chen, Tsin-Yuan Chang, Jyun-Neng Chen IEEE Transactions on Circuits and Systems - II: Express Briefs
2011-04 期刊論文 High Throughput DA-based DCT with High Accuracy Error-compensated Adder Tree Yuan-Ho Chen*, Tsin-Yuan Chang, Chung-Yi Li IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2010-11 研討會論文 A Statistical Error-Compensated Booth Multiplier and Its DCT Applications Yuan-Ho Chen*, Tsin-Yuan Chang, and Ruei-Yuan Jou
2009-08 研討會論文 High Performance DA-Based DCT with Error Compensated Adder Tree Yuan-Ho Chen*, Tsin-Yuan Chang
2006-10 期刊論文 Power Control for CDMA Cellular Radio Systems via L1 Optimal Predictor Bor-Sen Chen*, Bore-Kuen Lee, Yuan-Ho Chen IEEE Transactions on Wireless Communications
2006-10 期刊論文 Robust H Power Control for CDMA Cellular Communication Systems Bore-Kuen Lee, Yuan-Ho Chen, Bor-Sen Chen* IEEE Transactions on Signal Processing