| 出版年月 |
著作類別 |
著作名稱 |
作者 |
收錄出處 |
| 2022-11 |
期刊論文
|
A Harmonic Radar Tag With High Detection Range Utilizing Ge FinFETs CMOS Technology |
C. H. Hsieh, T. C. Hong, ... T. S. Chao, et al. |
IEEE ELECTRON DEVICE LETTERS
|
| 2022-04 |
期刊論文
|
First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications |
S. W. Chang, T. H. Lu, ... T. S. Chao, et al. |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2022-04 |
期刊論文
|
Role of Nitrogen in Ferroelectricity of HfxZr1−xO2-Based Capacitors With Metal-Ferroelectric-Insulator-Metal Structure |
D. R. Hsieh, C. C. Lee, and T. S. Chao* |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2022-03 |
期刊論文
|
Hysteresis-Free Gate-All-Around Stacked Poly-Si Nanosheet Channel Ferroelectric HfxZr1-xO2 Negative Capacitance FETs With Internal Metal Gate and NH3 Plasma Nitridation |
C. C. Lee, D. R. Hsieh, S. W. Li, Y. S. Kuo, and T. S. Chao* |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2022-02 |
期刊論文
|
High Endurance and Low Fatigue Effect of Bilayer Stacked Antiferroelectric/ Ferroelectric HfxZr1−xO2 |
C. Lo , C. K. Chen, C. F. Chang, F. S. Zhang, Z. H. Lu, and T. S. Chao* |
IEEE ELECTRON DEVICE LETTERS
|
| 2021-12 |
期刊論文
|
Investigation of Two Bits With Multistate Antifuse on nMOS Poly-Silicon Junctionless GAA OTP |
C. F. Chang, C. H. Shen, D. R. Hsieh, Z. H. Lu, C. C. Lin, and T. S. Chao* |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2021-10 |
期刊論文
|
Characteristics of In0.7Ga0.3As MOS Capacitors with Sulfur and Hydrazine Pretreatments |
Y. J. Lee, S. T. Chung, C. J. Su, T. C. Cho, and T. S. Chao |
ECS Journal of Solid State Science and Technology
|
| 2021-06 |
期刊論文
|
Reliability of p-Type Pi-Gate Poly-Si Nanowire Channel Junctionless Accumulation-Mode FETs |
D. R. Hsieh, K. C. Lin, C. C. Lee, and T. S. Chao* |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2021-02 |
期刊論文
|
CMOS-Compatible Fabrication of Low-Power Ferroelectric Tunnel Junction for Neural Network Applications |
Y. S. Kuo, S. Y. Lee, C. C. Lee, S. W. Li, T. S. Chao* |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2021-02 |
期刊論文
|
Ultrathin Sub-5-nm Hf1-xZrxO2 for a Stacked Gate-all-Around Nanowire Ferroelectric FET With Internal Metal Gate |
S. Y. Lee, C. C. Lee, Y. S. Kuo, S. W. Li, and T. S. Chao* |
IEEE J. OF THE ELECTRON DEVICES SOCIETY
|
| 2020-09 |
期刊論文
|
Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET Inverters |
P. J. Sung, S. W. Chang, K. H. Kao, C.T. Wu, C. J. Su, T. C. Cho, F. K. Hsueh, W. H. Lee, Y. J. Lee, T. S. Chao |
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
| 2020-05 |
期刊論文
|
Characteristics of Poly-Si Junctionless FinFETs With HfZrO Using Forming Gas Annealing |
S. T. Chung, Y. J. Lee, T. S. Chao |
IEEE TRANSACTIONS ON NANOTECHNOLOGY
|
| 2020-04 |
期刊論文
|
Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter |
P. J. Sung, C. J. Su, S. H. Lo, F. K. Hsueh, D. D. Lu, Y. J. Lee, and T. S. Chao |
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
|
| 2020-03 |
期刊論文
|
Nitride Induced Stress Affecting Crystallinity of Sidewall Damascene Gate-All-Around Nanowire Poly-Si FETs |
C. H. Shen, W. Y. Chen, S. Y. Lee, P. Y. Kuo, and T. S. Chao* |
IEEE TRANSACTIONS ON NANOTECHNOLOGY
|
| 2020-02 |
期刊論文
|
Effect of Seed Layer on Gate-All-Around Poly-Si Nanowire Negative-Capacitance FETs With MFMIS and MFIS Structures: Planar Capacitors to 3-D FETs |
S. Y. Lee, H. W. Chen, C. H. Shen, P. Y. Kuo, C. C. Chung, Y. E. Huang, H. Y. Chen, and T. S. Chao* |
IEEE Trans. On Electron Devices
|
| 2019-11 |
期刊論文
|
Experimental Demonstration of Stacked Gate-All-Around Poly-Si Nanowires Negative Capacitance FETs with Internal Gate Featuring Seed Layer and Free of Post-Metal Annealing Process |
S. Y. Lee, H. W. Chen, C. H. Shen, P. Y. Kuo, C. C. Chung, Y. .E. Huang, H. Y. Chen, T. S. Chao* |
IEEE Electron Device Letters
|
| 2019-09 |
期刊論文
|
Self -Limited Low-Temperature Trimming and Fully Silicided S/D for Vertically Stacked Cantilever Gate-All-Around Poly-Si Junctionless Nanosheet Transistors |
C. C. Chung, C. M. Ko, and T. S. Chao* |
IEEE J. OF the Electron Devices Society
|
| 2019-08 |
期刊論文
|
Characteristics of In0.7Ga0.3As MOS Capacitors Obtained using Hydrochloric Acid Treatment, Ammonium Sulfide Passivation, Methanol Treatment, and Forming Gas Annealing |
S. T. Chung, Y. C. Huang, Y. C. Fu, Y. J. Lee, T. S. Chao |
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
|
| 2019-01 |
期刊論文
|
Investigation of Nitrous Oxide Nitridation Temperatures on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode TFTs |
D. R. Hsieh, K. C. Lin, and T. S. Chao* |
IEEE J. OF the Electron Devices Society
|
| 2018-09 |
期刊論文
|
Variable-Channel Junctionless Poly-Si FETs: Demonstration and Investigation With Different Body Doping Concentrations |
J. Y. Lin, C. Y. Tsai, C. H. Shen, C. C. Chung, M. P. V. Kumar, and T. S. Chao* |
IEEE Electron Dev. Letters
|
| 2018-08 |
期刊論文
|
Junctionless FETs With a Fin Body for Multi-V-TH and Dynamic Threshold Operation |
M. P. V. Kumar, Y. J. Lin, K. H. Kao, and T. S. Chao* |
IEEE Trans. On Electron Devices
|
| 2018-04 |
期刊論文
|
Stacked Sidewall-Damascene Double-Layer Poly-Si Trigate FETs With RTA-Improved Crystallinity |
C. H. Shen, P. Y. Kuo, C. C. Chung, S. Y. Lee, and T. S. Chao |
IEEE Electron Dev. Letters
|
| 2018-02 |
期刊論文
|
Vertically Stacked Cantilever n-Type Poly-Si Junctionless Nanowire Transistor and Its Series Resistance Limit |
Chris C. C. Chung, C. H. Shen, J. Y. Lin, C. C. Chin, and T. S. Chao* |
IEEE Trans. On Electron Devices
|
| 2018-01 |
期刊論文
|
Investigation of Channel Doping Concentration and Reverse Boron Penetration on P-Type Pi-Gate Poly-Si Junctionless Accumulation Mode FETs |
D. R. Hsieh, Y. D. Chan, P. Y. Kuo, and T. S. Chao* |
IEEE J. of The Electron Dev. Soc.
|
| 2018-01 |
期刊論文
|
Junctionless Nanosheet (3 nm) Poly-Si TFT: Electrical Characteristics and Superior Positive Gate Bias Stress Reliability |
J. Y. Lin, M. P. V. Kumar, and T. S. Chao* |
IEEE Electron Dev. Letters
|
| 2016-11 |
期刊論文
|
High-performance pi-gate poly-Si junctionless and inversion mode FET |
D. R. Hsieh, J. Y. Lin, P. Y. Kuo, and T. S. Chao |
IEEE Trans. On Electron Devices
|
| 2016-06 |
期刊論文
|
Label-free and real-time detection of ferritin using a horn-like polycrystalline-silicon nanowire field-effect transistor biosensor |
L. C. Yen, T. M. Pan, C. H. Lee, T. S. Chao |
SENSORS AND ACTUATORS B-CHEMICAL
|
| 2015-11 |
期刊論文
|
Impacts of the Shell Doping Profile on the Electrical Characteristics of Junctionless FETs |
V. Kumar, C. Y. Hu, K. H. Kao, Y. J. Lee, T. S. Chao |
IEEE Trans on Electron Devices
|
| 2015-10 |
期刊論文
|
High-performance poly-Si TFT with ultra-thin channel film and gate oxide for low-power application |
Y. H. Chen, W. C. Y. Ma, T. S. Chao |
Semiconductor Science and Technology
|
| 2015-10 |
期刊論文
|
Impact of Crystallization Method on Poly-Si Tunnel FETs |
Y. H. Chen, W. C. Y. Ma, J. Y. Lin, C. Y. Lin, P. Y. Hsu, C. Y. Huang, C. Y. Huang, T. S. Chao |
IEEE Electron Device Letters
|
| 2015-01 |
期刊論文
|
Switching characteristics in Cu:SiO2 by chemical soak methods for resistive random access memory (ReRAM) |
F. T. Chin, Y. H. Lin, W. L. Yang, C. H. Liao, L. M. Lin, Y. P. Hsiao, T. S. Chao |
Solid-State Electronics
|
| 2014-12 |
期刊論文
|
Effect of Sensing Film Thickness on Sensing Characteristics of Dual-Gate Poly-Si Ion-Sensitive Field- Effect-Transistors |
L. C. Yen, M. T. Tang, C. Y. Tan, T. M. Pan, and T. S. Chao |
IEEE Electron Device Letters
|
| 2014-11 |
期刊論文
|
High-Performance GAA Sidewall-Damascened Sub-10-nm In Situ n(+)-Doped Poly-Si NWs Channels Junctionless FETs |
P. Y. Kuo, Y. H. Lu, and T. S. Chao |
IEEE Trans. on Electron Devices
|
| 2014-10 |
期刊論文
|
Advanced Cu chemical displacement technique for SiO2-based electrochemical metallization ReRAM application |
F. T. Chin, Y. H. Lin, H. C. You, W. L. Yang, L. M. Lin, Y. P. Hsiao, C. M. Ko, T. S. Chao |
Nanoscale research Letts.
|
| 2014-09 |
期刊論文
|
Ion-Bombarded and Plasma-Passivated Charge Storage Layer for SONOS-Type Nonvolatile Memory |
S. H. Liu, C. C. Wu, W. L. Yang, Y. H. Lin, T. S. Chao |
IEEE Trans. on Electron Devices
|
| 2014-05 |
期刊論文
|
Characterization of Ultra-Thin Ni Silicide Film by Two-Step Low Temperature Microwave Anneal |
C. T. Wu, Y. J. Lee, F. K. Hsueh, P. J. Sung, T. C. Cho, M. I. Current, T. S. Chao |
ECS J. OF Solid State Sci and Tech.
|
| 2014-03 |
期刊論文
|
Improvement in pH Sensitivity of Low-Temperature Polycrystalline-Silicon Thin-Film Transistor Sensors Using H-2 Sintering |
L. C. Yen, M. T. Tang, F. Y. Chang, T. M. Pan, T. S. Chao, C. H. Lee |
SENSORS
|
| 2014-03 |
期刊論文
|
Low-Temperature Microwave Annealing Processes for Future IC Fabrication-A Review |
Y. J. Lee, T. C. Cho, S. S. Chuang, F. K. Hsueh, Y.L. Lu, P. J. Sung, H. C. Chen, M. I. Current, T. Y. Tseng, T. S. Chao |
IEEE Trans. on Electron Devices
|
| 2013-11 |
期刊論文
|
Novel Ion Bombardment Technique for Doping Limited Cu Source in SiOx-Based Nonvolatile Switching Layer |
S. H. Liu, W. L. Yang, Y. H. Lin, C. C. Wu, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-10 |
期刊論文
|
High-Performance Double-Layer Nickel Nanocrystal Memory by Ion Bombardment Technique |
S. H. Liu, W. L. Yang, Y. H. Lin, C. C. Wu, T. S. Chao |
IEEE TRANS ON ELECTRON DEVICES
|
| 2013-09 |
期刊論文
|
Improved Rear-Side Passivation by Atomic Layer Deposition Al2O3/SiNx Stack Layers for High V-OC Industrial p-Type Silicon Solar Cells |
J. W. Lin, Y. Y. Chen, J. Y. Gan, W. P. Hseih, C. H. Du, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-08 |
期刊論文
|
Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors |
K. M. Chen, T. I. Tsai, T. Y. Lin, H. C. Lin, T. S. Chao, G. W. Huang, T. Y. Huang |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-08 |
期刊論文
|
Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC |
Y. H. Chen, L. C. Yen, T. S. Chang, T. Y. Chiang, P. Y. Kuo, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-07 |
期刊論文
|
High-kappa Eu2O3 and Y2O3 Poly-Si Thin-Film Transistor Nonvolatile Memory Devices |
T. M. Pan, L. C. Yen, S. H. Huang, C. T. Lo, T. S. Chao |
IEEE TRANS ON ELECTRON DEVICES
|
| 2013-05 |
期刊論文
|
Enhancement of Open-Circuit Voltage Using CF4 Plasma Treatment on Nitric Acid Oxides |
J. W. Lin, C. H. Wu, S. W. Wu, W. P. Hseih, C. H. Du, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-04 |
期刊論文
|
Impacts of Multiple Strain-Gate Engineering on a Zero-Temperature-Coefficient Point |
T. S. Chang, T. Y. Lu, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2013-02 |
期刊論文
|
Al-SiO2-Y2O3-SiO2-poly-Si Thin-Film Transistor Nonvolatile Memory Incorporating a Y2O3 Charge Trapping Layer |
T. M. Pan, L. C. Yen, S. Mondal, C. T. Lo, T. S. Chao |
ECS SOLID STATE LETTERS
|
| 2013-02 |
期刊論文
|
Microwave Annealing of Phosphorus and Cluster Carbon Implanted (100) and (110) Si |
T. C. Cho, Y. L. Lu, J. Y. Yao, Y. J. Lee, K. Sekar, N. Tokoro, H. Onoda, W. Krull, M. I. Current, T. S. Chao |
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
|
| 2013-01 |
期刊論文
|
High-Performance Polyimide-Based ReRAM for Nonvolatile Memory Application |
S. H. Liu, W. L. Yang, C. C. Wu, T. S. Chao, M. R. Ye, M. R. Ye, Y. Y. Su, P. Y. Wang, M. J. Tsai |
IEEE ELECTRON DEVICE LETTERS
|
| 2012-12 |
期刊論文
|
Polycrystalline silicon thin-film transistor with nickel–titanium oxide by sol–gel spin-coating and nitrogen implantation |
S. C. Wu, T. H. Hou, S. H. Chuang, H. C. Chou, T. S. Chao, and T. F. Lei |
Solid-State Electronics
|
| 2012-11 |
期刊論文
|
Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications |
T. I. Tsai, K. M. Chen, H. C. Lin, T. Y. Lin, C. J. Su, T. S. Chao, T. Y. Huang |
IEEE ELECTRON DEVICE LETTERS
|
| 2012-10 |
期刊論文
|
A Novel Ion-Bombarded and Plasma-Passivated Charge Storage Layer for SONOS-type Nonvolatile Memory |
S. H. Liu, W. L. Yang, and T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2012-08 |
期刊論文
|
Reliability Analysis of Symmetric Vertical Channel Nickel-Salicided Poly-Si Thin-Film Transistors |
Y. H. Wu, J. W. Lin, Y. H. Lu, R. H. Kuo, L. C. Yen, Y. H. Chen, C. C. Liao, P. Y. Kuo and T. S. Chao |
IEEE Trans. on Electron Dev.
|
| 2012-06 |
期刊論文
|
Hydrogen Instability Induced by Postannealing on Poly-Si TFTs |
C. C. Liao, M. C. Lin, T. S. Chao* |
IEEE Trans. on Electron Dev.
|
| 2012-06 |
期刊論文
|
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique |
C. J. Su, T. I. Tsai, H. C. Lin, T. Y. Huang, T. S. Chao |
NANOSCALE RESEARCH LETTERS
|
| 2012-06 |
期刊論文
|
Novel 2-Bit/Cell Wrapped-Select-Gate SONOS TFT Memory Using Source-Side Injection for NOR-Type Flash Array |
K. T. Wang, F. C. Hsueh, Y. L. Lu, T. Y. Chiang, Y. H. Wu, C. C. Liao, L. C. Yen, T. S. Chao |
IEEE ELECTRON DEVICE LETTERS
|
| 2012-06 |
期刊論文
|
Temperature Dependence of Electron Mobility on Strained nMOSFETs Fabricated by Strain-Gate Engineering |
T. S. Chang, T. Y. Lu, and T. S. Chao |
IEEE Electron Dev. Letts.
|
| 2012-04 |
期刊論文
|
Electrical and reliability characteristics of polycrystalline silicon thin-film transistors with high-kappa Eu2O3 gate dielectrics |
L. C. Yen, C. W. Hu, T. Y. Chiang, T. S. Chao, T. M. Pan |
Applied Phys Letts.
|
| 2012-04 |
期刊論文
|
Robust Data Retention and Superior Endurance of Silicon-Oxide-Nitride-Oxide-Silicon-Type Nonvolatile Memory with NH3-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer |
S. H. Liu, W. L. Yang, Y. P. Hsiao, T. S. Chao |
Jpn. J. of Applied Phys.
|
| 2012-02 |
期刊論文
|
High-Performance Poly-Si Thin-Film Transistors With L-Fin Channels |
Y. H. Lu, P. Y. Kuo, J. W. Lin, Y. H. Wu, Y. H. Chen, and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2012-02 |
期刊論文
|
Impacts of the Underlying Insulating Layers on the MILC Growth Length and Electrical Characteristics |
C. C. Liao, M. C. Lin, S. X. Liu, and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2012-02 |
期刊論文
|
Susceptor Coupling for the Uniformity and Dopant Activation Efficiency in Implanted Si Under Fixed-Frequency Microwave Anneal |
Y. J. Lee, F. K. Hsueh, M. I. Current, C. Y. Wu, and T. S. Chao |
IEEE Electron Dev. Letts.
|
| 2012-01 |
期刊論文
|
Oxide Thinning and Structure Scaling Down Effect of Low-Temperature Poly-Si Thin-Film Transistors |
C. Y. Ma, T. Y. Chiang, J. W. Lin, and T. S. Chao* |
J. of Display Tech.
|
| 2012-01 |
期刊論文
|
Simultaneous Activation and Crystallization by Low-Temperature Microwave Annealing for Improved Quality of Amorphous Silicon Thin-Film Transistors |
Y. L. Lu, Y. J. Lee, and T. S. Chao |
ECS SOLID STATE LETTERS
|
| 2011-11 |
期刊論文
|
Effects of Channel Width and Nitride Passivation Layer on Electrical Characteristics of Polysilicon Thin-Film Transistors |
C. C. Liao, M. C. Lin, T. Y. Chiang, and T. S. Chao* |
IEEE Trans. on Electron Dev.
|
| 2011-07 |
期刊論文
|
Amorphous-Layer Regrowth and Activation of P and As Implanted Si by Low-Temperature Microwave Annealing |
F. K. Hsueh, Y. J. Lee, K. L. Lin, M. I. Current, C. Y. Wu, and T. S. Chao |
IEEE Trans. on Electron Devices
|
| 2011-07 |
期刊論文
|
Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors With Self-Aligned Oxide Overetching Structures |
Y. H. Wu, P. Y. Kuo, Y. H. Lu, Y. H. Chen, T. Y. Chiang, K. T. Wang, L. C. Yen, and T. S. Chao |
IEEE Trans. Electron Dev.
|
| 2011-05 |
期刊論文
|
High Tensile Stress with Minimal Dopant Diffusion by Low Temperature Microwave Anneal |
Y. J. Lee, Y. L. Lu, Z. C. Mu, F. K. Hseuh, T. S. Chao, C. Y. Wu |
Electrochemi. Solid Sate Lett.
|
| 2011-04 |
期刊論文
|
Channel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film Transistors |
C. Y. Ma, T. Y. Chiang, C. R. Yeh, T. S. Chao*, and T. F. Lei |
IEEE Trans. On Electron Dev.
|
| 2011-04 |
期刊論文
|
Characterization of Enhanced Stress Memorization Technique on nMOSFETs by Multiple Strain-Gate Engineering |
T. Y. Lu, T. S. Chang, S. A. Huang and T. S. Chao* |
IEEE Trans. On Electron Dev.
|
| 2011-04 |
期刊論文
|
Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels |
C. J. Su, T. I. Tsai, Y. L. Lio, Z. M. Lin, H. C. Lin, and T. S. Chao |
IEEE Electron Dev. Letts.
|
| 2011-03 |
期刊論文
|
Fabrication of sub-100-nm metal-oxide-semiconductor field-effect transistors with asymmetrical source/drain using I-line double patterning technique |
H. C. Lin, T. I. Tsai, T. S. Chao, M. F. Jian, T. Y. Huang |
J. Vac. Sci. and TECH. B
|
| 2011-02 |
期刊論文
|
Novel Sub-10-nm Gate-All-Around Si Nanowire Channel Poly-Si TFTs With Raised Source/Drain |
Y. H. Lu, P. Y. Kuo, Y. H. Wu, Y. H. Chen, and T. S. Chao |
IEEE Electron Device Letts.
|
| 2011-01 |
期刊論文
|
Fabrication and Characterization of High-k Dielectric Nickel Titanate Thin Films Using a Modified Sol-Gel Method |
S. H. Chuang, M. L. Hsieh, S. C. Wu, H. C. Lin, T. S. Chao, and T. H. Hou |
Journal of the American Ceramic Society
|
| 2011-01 |
期刊論文
|
High-Performance Poly-Si TFTs of Top-Gate with High-kappa Metal-Gate Combine the Laser Annealed Channel and Glass Substrate |
Y. H. Lu, C. H. Chien, P. Y. Kuo, M. J. Yang, H. Y. Lin, and T. S. Chao* |
Electrochem. and Solid State Letts.
|
| 2011-01 |
期刊論文
|
Impact of Strain Layer on Gate Leakage and Interface-State for nMOSFETs Fabricated by Stress-Memorization Technique |
C. C. Liao, M. C. Lin, T. Y. Chiang, and T. S. Chao* |
Electrochem. and Solid State Letts.
|
| 2010-11 |
期刊論文
|
A Novel PN-Diode Structure of SONOS-type TFT NVM with Embedded Silicon-Nanocrystals |
T. Y. Chiang, William C. Y. Ma, Y. H. Wu, K. T. Wang, and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2010-11 |
期刊論文
|
Novel Symmetric Vertical Channel Ni-Salicided Poly-Si Thin-Film Transistors with High ON / OFF Current Ratio |
Y. H. Wu, P. Y. Kuo, Y. H. Lue, Y. H. Chen, and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2010-10 |
期刊論文
|
The Zero Temperature Coefficient (ZTC) Point Modeling of DTMOS in CMOS Integration |
K. T. Wang, W. C. Lin and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2010-09 |
期刊論文
|
High-Reliability Dynamic-Threshold Source-Side Injection for 2-Bit/Cell With MLC Operation of Wrapped Select-Gate SONOS in NOR-Type Flash Memory |
K. T. Wang, T. S. Chao*, W. C. Wu, W. L. Yang, C. H. Lee, T. M. Hsieh, J. C. Liou, S. D. Wang, T. P. Chen, C. H. Chen, C. H. Lin, and H. H. Chen |
IEEE Trans. On Electron Dev.
|
| 2010-08 |
期刊論文
|
Characteristics of SONOS-Type Flash Memory With In Situ Embedded Silicon Nanocrystals |
T. Y. Chiang, Y. H. Wu, William C. Y. Ma, P. Y. Kuo, K. T. Wang, C. C. Liao, C. R. Yeh, W. L. Yang, and T. S. Chao* |
IEEE Trans. On Electron Dev.
|
| 2010-05 |
期刊論文
|
A simple method for sub-100 nm pattern generation with I-line double-patterning technique |
T. S. Tsai, H. C. Lin, M. F. Jian, T. Y. Huang, and T. S. Chao |
MICROELECTRONICS RELIABILITY
|
| 2010-05 |
期刊論文
|
Nanoscale p-MOS Thin-Film Transistor with TiN Gate Electrode Fabricated by Low-Temperature Microwave Dopant Activation |
Y. L. Lu, F. K. Hsueh, K. C. Huang, T. Y. Cheng, Y. J. Lee, T. S. Chao, and C. Y. Wu |
IEEE Electron Dev. Letts.
|
| 2010-04 |
期刊論文
|
Benefit of NMOS by Compressive SiN as Stress Memorization Technique and Its Mechanism |
C. C. Liao, T. Y. Chiang, M C. Lin, and T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2010-01 |
期刊論文
|
The Characteristics of n- and p-Channel Poly-Si Thin-Film Transistors with Fully Ni-Salicided S/D and Gate Structure |
P. Y. Kuo, Y. S. Huang, Y. H. Luo, T. S. Chao, and T. F. Lei |
J. Electrochem. Soc.
|
| 2009-11 |
期刊論文
|
Physical Mechanism of High-Programming-Efficiency Dynamic-Threshold Source-Side Injection in Wrapped-Select-Gate SONOS for NOR-Type Flash Memory |
K. T. Wang, T. S. Chao*, T. Y. Chiang, W. C. Wu, P. Y. Kuo, Y. H. Wu, Y. L. Lu, C. C. Liao, W. L. Yang, C. H. Lee, T. M. Hsieh, J. C. Liou, S. D. Wang, T. P. Chen, C. H. Chen, C. H. Lin, H. H. Chen |
IEEE Electron Dev. Letts.
|
| 2009-10 |
期刊論文
|
Electrical Characteristics of High Performance SPC and MILC p-Channel LTPS-TFT with High-k Gate Dielectric |
M. W. Ma, T. Y. Chiang, C. R. Yeh, T. S. Chao*, and T. F. Lei |
Electrrochem. and Solid State Letters
|
| 2009-09 |
期刊論文
|
MILC-TFT With High-kappa Dielectrics for One-Time-Programmable Memory Application |
T. Y. Chiang, M. W. Ma, Y. H, Wu, P. Y. Kuo, K. T. Wang, C. C. Liao, C. R. Yeh, T. S. Chao* |
IEEE Electron Dev. Letts.
|
| 2009-07 |
期刊論文
|
High-performance p-channel LTPS-TFT using HfO2 gate dielectric and nitrogen ion implantation |
M. W. Ma, T. Y. Chiang, T. S. Chao*, T. F. Lei |
Semi. Sci. and Tech.
|
| 2009-06 |
期刊論文
|
High-Speed Multilevel Wrapped-Select-Gate SONOS Memory Using a Novel Dynamic Threshold Source-Side-Injection (DTSSI) Programming Method |
K. T. Wang, T. S. Chao*, W. C. Wu, T. Y. Chiang, Y. H. Wu, W. L. Yang, C. H. Lee, T. M. Hsieh, J. C. Lioi, S. D. Wang, T. P. Chen, C. H. Chen, C. H. Lin, and H. H. Chen |
IEEE Electron Device Lett.
|
| 2009-04 |
期刊論文
|
Novel Field-Induced Gray-Level Selective Patterning of Self-Assembled Aminosilane Monolayer on SiO2 Surfaces by Scanning Probe Bond-Breaking Lithography |
C. H. Wu, T. M. Lee, J. T. Sheu, T. S. Chao |
Jpn J. OF Appl. Phys.
|
| 2009-03 |
期刊論文
|
Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor Deposition |
P. Y. Kuo, T. S. Chao, J. S. Huang, T. F. Lei |
IEEE Electron Device Lett.
|
| 2009-03 |
期刊論文
|
Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization Technology |
P. Y. Kuo, T. S. Chao, J. T. Lai, and T. F. Lei |
IEEE Electron Device Letts.
|
| 2009-01 |
期刊論文
|
Enhancement of Stress-Memorization Technique on nMOSFETs by Multiple Strain-Gate Engineering |
T. Y. Lu, C. M. Wang, and T. S. Chao* |
Electrochem. and Solid State Letters
|
| 2008-12 |
期刊論文
|
Characteristics of HfO2/Poly-Si Interfacial Layer on CMOS LTPS-TFTs With HfO2 Gate Dielectric and O2 Plasma Surface Treatment |
M. W. Ma, T. Y. Chiang, W. C. Wu, T. S. Chao*, and T. F. Lei |
IEEE Trans. On Electron Dev.
|
| 2008-12 |
期刊論文
|
Positive Bias Temperature Instability (PBTI) Characteristics of Contact Etch Stop Layer Induced Local Tensile Strained HfO2 nMOSFET |
W. C. Wu, T. S. Chao*, T. H. Chiu, J. C. Wang, C. S. Lai, M. W. Ma, and W. C. Lo |
IEEE Electron Device Lett.
|
| 2008-11 |
期刊論文
|
Impacts of N2 and NH3 Plasma Surface-Treatment on High Performance LTPS-TFT with High-k Gate Dielectric |
M. W. Ma, T. S. Chao*, T. Y. Chiang, W. C. Wu, and T. F. Lei |
IEEE Electron Device Lett.
|
| 2008-10 |
期刊論文
|
High program/erase speed SONOS with in-situ silicon nanocrystal |
T. Y. Chiang, T. S. Chao*, Y. H. Wu, and W. L.Yang |
IEEE Electron Device Lett.
|
| 2008-10 |
期刊論文
|
Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer |
T. I. Tsai, H. C. Lin, Y. J. Lee, K. S. Chen, J. Wang, F. K. Hsueh, T. S. Chao, T. Y. Huang |
Solid-State Electronics
|
| 2008-09 |
期刊論文
|
X-ray Photoelectron Spectroscopy Energy Band Alignment of CoTiO3 High-K Dielectric |
K. H. Ko, S. H. Chuang, W. C. Wu, T. S. Chao*, J. H. Chen, M. W. Ma, R. H. Gao, amd M. Y. Chiang |
Appl. Phys. Lett.
|
| 2008-08 |
期刊論文
|
Performance and interface characterization for contact etch stop layer-strained nMOSFET with HfO2 gate dielectrics under pulsed-IV measurement |
W. C. Wu, T. S. Chao*, T. H. Chiu, J. C. Wang, C. S. Lai, M. W. Ma, W. C. Lo |
Electrochemical and Solid State Lett.
|
| 2008-07 |
期刊論文
|
Carrier transportation mechanism of the TaN/HfO2/IL/Si structure with silicon surface fluorine implantation |
W. C. Wu, C. S. Lai, T. M. Wang, J. C. Wang, C. W. Hsu, M. W. Ma, W. C. Lo, T. S. Chao |
IEEE Trans. ON Eelectron Devices
|
| 2008-07 |
期刊論文
|
SONOS memories with embedded silicon nanocrystals in nitride |
M. C. Liu, T. Y. Chiang, P. Y. Kuo, M. H. Chou, Y. H. Wu, H. C. You, C. H. Cheng, S. H. Liu, W. L. Yang, T. F. Lei, and T. S. Chao* |
Semiconductor Science and Technology
|
| 2008-06 |
期刊論文
|
High-performance metal-induced laterally crystallized polycrystalline silicon p-channel thin-film transistor with TaN/HfO2 gate stack structure |
M. W. Ma, T. S. Chao*, C. J. Su, W. C. Wu, K. H. Kao, T. F. Lei |
IEEE Electron Device Lett.
|
| 2008-05 |
期刊論文
|
Reliability mechanisms of LTPS-TFT with HfO2 gate dielectric: PBTI, NBTI, and hot-carrier stress |
M. W. Ma, C. Y. Chen, W. C. Wu, C. J. Su, K. H. Kao, T. S. Chao*, and T. F. Lei |
IEEE Trans. on Electron Devices
|
| 2008-03 |
期刊論文
|
Improvement on perfromance and reliability of TaN/HfO2 LTPS-TFT with fluorine implantation |
M. W. Ma, C. Y. Chen, C. J. Su, W. C. Wu, T. Y. Yang, K. H. Kao, T. S. Chao*, T. F. Lei |
Soild-State Electronics
|
| 2008-02 |
期刊論文
|
Characteristics of PBTI and hot carrier stress for LTPS-TFT with high-kappa gate dielectric |
M. W. Ma, C. Y, Chen, C. J. Su, W. C. Wu, Y. H. Wu, K. H. Kao, T. S. Chao*, and T. F. Lei |
IEEE Electron Device Lett.
|
| 2008-02 |
期刊論文
|
Impacts of fluorine ion implantation with low-temperature solid-phase crystallized activation on high-kappa LTPS-TFT |
M. W. Ma, C. Y, Chen, C. J. Su, W. C. Wu, Y. H. Wu, K. H. Kao, T. S. Chao*, and T. F. Lei |
IEEE Electron Device Lett.
|
| 2008-01 |
期刊論文
|
Current transport mechanism for HfO2 gate dielectrics with fluorine incorporation |
W. C. Wu, C. S. Lai, T. M. Wang, J. C. Wang, C. W. Hsu, M. W. Ma, T. S. Chao |
Electrochemical and Solid State Lett.
|
| 2008-01 |
期刊論文
|
Optimized ONO thickness for multi-level and 2-bit/cell operation for wrapped-select-gate (WSG) SONOS memory |
W. C. Wu, T. S. Chao*, W. C. Peng, W. L. Yang, J. H. Chen, M. W. Ma, C. S. Lai, T. Y. Yang, C. H. Lee, T. S. Hsieh, J. C. Liou, T. P. Chen, C. H. Chen, C. H. Lin, H. H. Chenm J. Ko |
Semiconductor Science and Technology
|
| 2007-10 |
期刊論文
|
Nonvolatile memory characteristics with embedded hemispherical silicon nanocrystals |
J. H. Chen, T. F. Lei, D. Landheer, X. H. Wu, M. W. Ma, W. C. Wu, T. Y. Yang, and T. S. Chao* |
Jpn J. OF Appl. Phys.
|
| 2007-10 |
期刊論文
|
Si nanocrystal memory devices self-assembled by in situ rapid thermal annealing of ultrathin a-Si on SiO2 |
J. H. Chen, T. F. Lei, D. Landheer, X. Wu, J. Liu, T. S. Chao* |
Electrochemical and Solid State Lett.
|
| 2007-09 |
期刊論文
|
Performance enhancement by local strain in (110) channel n-channel metal-oxide-semicondiactor field-effect transistors on (111) substrate |
W. C. Lo, Y. H. Ku, J. Y. Lee, T. S. Chao, C. Y. Chang |
Jpn J. OF Appl. Phys.
|
| 2007-09 |
期刊論文
|
Scanning probe lithography of self-assembled N-(2-aminoethyl)-3-aminopropyltrimeth-oxysilane monolayers on SiO2 surface |
C. H Wu, J. T. Sheu, C. H. Chen, and T. S. Chao |
Jpn J. OF Appl. Phys.
|
| 2007-07 |
期刊論文
|
High-performance HfO2 gate dielectrics fluorinated by postdeposition CF4 plasma treatment |
W. C. Wu, C. S. Lai, J. C. Wang, J. H. Chen, M. W. Ma, T. S. Chao |
J. OF The Electrochem. Soc.
|
| 2007-05 |
期刊論文
|
Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratio |
P. Y. Kuo, T. S. Chao, P. S. Hsieh, T. F. Lei |
IEEE Trans on Electron Devices
|
| 2007-04 |
期刊論文
|
Impact of channel dangling bonds on reliability characteristics of flash memory on poly-Si thin films |
Y. H. Lin, C. H. Chien, T. H. Chou. T. S. Chao, T. F. Lei |
IEEE ELECTRON DEVICE LETT.
|
| 2007-03 |
期刊論文
|
Highly reliable multilevel and 2-bit/cell operation of wrapped select gate (WSG) SONOS memory |
W. C. Wu, T. S. Chao*, W. C. Peng, W. L. Yang, J. C. Wang, J. H. Chen, C. S. Lai, T. Y. Yang, C. H. Lee, T. M. Hsieh, J. C. Liou |
IEEE ELECTRON DEVICE LETT.
|
| 2007-03 |
期刊論文
|
Impact of high-k offset spacer in 65-nm node SOI devices |
M. W. Ma, C. H. Wu, T. Y. Yang, K. H. Kao, W. C. Wu, S. J.Wang, T. S. Chao*, and T. F. Lei |
IEEE ELECTRON DEVICE LETT.
|
| 2007-03 |
期刊論文
|
Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicate |
Y. H. Lin, C. H. Chien, T. H. Chou, T. S. Chao, T. F. Lei |
IEEE Trans. on Electron Devices
|
| 2007-03 |
期刊論文
|
Systematical study of reliability issues in plasma-nitrided and thermally nitrided oxides for advanced dual-gate oxide p-channel metal-oxide-semiconductor field-effect transistors |
W. C. Lo, S. Y. Wu, S. J. Chang, M. C. Chiang, C. Y. Lin, T. S. Chao*, and C. Y. Chang |
Jpn. J. Appl. Phys.
|
| 2007-01 |
期刊論文
|
Performance improvement of CoTiO3 high-k dielectrics with nitrogen incorporation |
J. H. Chen, T, B, Huang, X. H. Wu, L. Dolf, T. F. Lei, T. S. Chao* |
J. OF The Electrochem. Soc.
|
| 2006-11 |
期刊論文
|
High-kappa material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications |
M. W. Ma, T. S. Chao*, K. H. Kao, J. S. Huang, and T. F. Lei |
Jpn. J. Appl. Phys.
|
| 2006-10 |
期刊論文
|
The impact of deep Ni salicidation and NH3 plasma treatment on nano-SOI FinFETs |
H. C. You, P. Y. Kuo, F. H. Ko, T. S. Chao, and T. F. Lei |
IEEE Electron Device Lett.
|
| 2006-09 |
期刊論文
|
Fringing electric field effect on 65-nm-node fully depleted silicon-on-insulator devices |
M. W. Ma, T. S. Chao*, Kao K. H, J. S. Huang, and T. F. Lei |
Jpn. J. Appl. Phys.
|
| 2006-09 |
期刊論文
|
Improving electrical characteristics of high-k NiTiO dielectric with nitrogen ion implantation |
W. L. Yang, T. S. Chao, S. C. Chen, C. H. Yang, and W. C. Peng |
Jpn. J. Appl. Phys.
|
| 2006-09 |
期刊論文
|
Prospect of cobalt-mix-tetraethoxysilane method on localized lateral growth of carbon nanotubes for both p- and n-type field effect transistors |
B. H. Chen, H. C. Lin, T. Y. Huang, J. H. Wei, C. L. Hwang, P. Y. Lo, M. J. Tsai, and T. S. Chao* |
J. Vac. Sci. Technol. B
|
| 2006-08 |
期刊論文
|
Suppression of interfacial reaction for HfO2 on silicon by pre-CF4 plasma treatment |
C. S. Lai, W. C. Wu, T. S. Chao, J. H. Chen, J. C. Wang, L. L. Tay, N. Rowell |
Appl. Phys. Lett.
|
| 2006-04 |
期刊論文
|
Characteristics of Fluorine Implantation for HfO2 Gate Dielectrics with High-Temperature Postdeposition Annealing |
C. S. Lai, W. C. Wu, J. C. Wang and T. S. Chao |
JPN J APPL PHYS
|
| 2006-04 |
期刊論文
|
High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structure |
P. Y. Kuo, T. S. Chao*, R. J. Wang, and T. F. Lei |
IEEE Electron Device Lett.
|
| 2006-04 |
期刊論文
|
Novel Method of Converting Metallic-Type Carbon Nanotubes to Semiconducting-Type Carbon Nanotube Field-Effect Transistors |
B. H. Chen, J. H. Wei, P. Y. Lo, Z. W. Pei, T. S. Chao, H. C. Lin and T. Y. Huang |
Jpn. Journal of Appl. Phys
|
| 2006-04 |
期刊論文
|
Selective deposition of gold particles on dip-pen nanolithography patterns on silicon dioxide surfaces |
J. T. Sheu, C. H. Wu, and T. S. Chao |
Jpn. J. Appl. Phys.
|
| 2006-03 |
期刊論文
|
Crystal orientation and nitrogen effects on the carrier mobility of p-type metal oxide semiconductor field effect transistor with ultra thin gate dielectrics |
Y. J. Lee, P. T. Ho, W. L. Yang, T. S. Chao*, T. Y. Huang |
Jpn Journal of Applied Physics
|
| 2006-02 |
期刊論文
|
Complementary carbon nanotube-gated carbon nanotube thin-film transistor |
B. H. Chen, H. C. Lin, T. Y. Huang, J. H. Wei, H. H. Wang, M. J. Tsai, T. S. Chao |
APPLIED PHYSICS LETTERS
|
| 2006-01 |
期刊論文
|
Reduction of Donor-like Interface Traps of n-Type Metal-Oxide-Semiconductor Field-Effect-Transistors Using Hydrogen-Annealed Wafer and In-situ HF-Vapor Treatment |
T. S. Chao*, Y. H. Lin, and W. L. Yang |
Jpn Journal of Applied Physics
|
| 2005-10 |
期刊論文
|
Localized lateral gtowth of single-walled carbon nanotubes for field-effect transsitors by a cobalt-mix-TEOS method |
B. H. Chen, P. Y. Lo,J. H. Wei, M. J. Tsai, C. L. Hwang, T. S. Chao*, H. C. Lin, and T. Y. Huang |
Electrochemical and Solid-State Letters
|
| 2005-08 |
期刊論文
|
Effects of Metallic Comtaninations on the Electrical Characteritics of Ultra-thin Gate Oxides |
T. M Pan, F. H. Kuo, T. S. Chao*, C. C. Chen, and K. S. Chang-Liao |
Electrochemical and Soild-State Letters
|
| 2005-07 |
期刊論文
|
High Voltage Application and NBTI Effects of DT-PMOS with Reverse Schottky Contact |
Y. J. Lee, T. S. Chao*, and T. Y. Huang |
Microelectronic Reliability
|
| 2005-05 |
期刊論文
|
Characterization of CF4-plasma fluorinated HfO2 gate dielectrics with TaN metal gate |
C. S. Lai, W. C. Wu, J. C. Wang, and T. S Chao |
APPLIED PHYSICS LETTERS
|
| 2005-04 |
期刊論文
|
Mobility Enhancement in Local Strain Channel nMOSFETs by Stacked a-Si/Poly-Si Gate and Capping Nitride |
T. Y. Lu, and T. S. Chao* |
IEEE Electron Device Lett.
|
| 2004-12 |
期刊論文
|
CoTiO3 High-k dielectrics for DRAM Applications |
T. S. Chao*, W. M. Ku, H. C. Lin, D. Landheer, Y. Y. Wang, and Y. Mori |
IEEE Trans. on Electron Devices
|
| 2004-11 |
期刊論文
|
Suppression of boron penetration in P+-poly-SiGe gate p-channel metal-oxide-semiconductor field-effect transistor using NH3-nitrided and N2O-grown gate oxides |
W. L. Yang, T. S. Chao, K. H. Lai |
JPN J APPL PHYS
|
| 2004-09 |
期刊論文
|
Mobility enhancement of MOSFETs on p-silicon (111) with in situ HF-Vapor. pre-gate oxide cleaning |
T. S. Chao*, Y. H. Lin, and W. L. Yang |
IEEE Electron Device Lett.
|
| 2004-09 |
期刊論文
|
Suppression of the Floating-Body Effect in Poly-Si Thin-Film Transistors With Self-Aligned Schottky Barrier Source and Ohmic Body Contact Structure |
P. Y. Kuo, T. S. Chao*, T. F. Lei |
EEE Electron Device Lett.
|
| 2004-08 |
期刊論文
|
Novel One-Step Aqueous Solutions to Replace Pregate Oxide Clean |
T. M. Pan, T. F. Lei, F H. Ko, T. S Chao*, T. H. Chiu, and C. P. Lu |
IEEE Trans. On Semiconductor Manufacturing
|
| 2004-05 |
期刊論文
|
Characterization of interfacial layer of ultrathin Zr silicate on Si(100) using spectroscopic ellipsometry and HRTEM |
H. Ahn, H. W. Chen, D. Landheer, X. Wu, L. J. Chou, T. S. Chao |
Thin Solid Film
|
| 2004-04 |
期刊論文
|
Hot carrier Degradations of Dynamic threshold Silicon on Insulator p-type MOSFETS |
T. S. Chao*,Yao-Jen Lee, Chun-Yang Huang, Horng-Chih Lin, Yiming Li and Tiao-Yuan Huang |
JPN J APPL PHYS
|
| 2004-02 |
期刊論文
|
High Voltage and High Temperature Applications of DTMOS with Reverse Schottky Barrier on Substrate Contacts |
T. S. Chao*, Yao-Jen Lee, and Tiao-Yuan Huang |
IEEE Electron Device Lett.
|
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