Wafer-scale Fabrication of Al/MoS2/Poly-Si Memristors and Insight of Mechanism on the Resistive Switching
K. S. Li, M. K. Huang, Y. H. Wang, Y. C. Tseng, and C. J. Su
ACS Appl. Electronic Materials
2023-12
研討會論文
Robust Recovery Scheme for MFIS-FeFETs at Optimal Timing with Prolonged Endurance: Fast-Unipolar Pulsing (100 ns), Nearly Zero Memory Window Loss (0.02%), and Self-Tracking Circuit Design
C. H. Wu, J. Liu, X. T. Zheng, Y. M. Tseng, M. Kobayashi, V. P. H. Hu, and C. J. Su*
2023-11
期刊論文
Impact of Nanosheet Thickness on Performance and Reliability of Polycrystalline-Silicon Thin-Film Transistors with Double-Gate Operation
W. C. Y. Ma, C. J. Su, K. H. Kao, J. Q. Guo, C. J. Wu, P. Y. Wu, and J. Y. Hung
IEEE Trans. Nanotechnology
2022-07
期刊論文
On the Thickness Dependence of the Polarization Switching Kinetics in HfO2-based Ferroelectric
Y. Sawabe, T. Saraya, T. Hiramoto, C. J. Su, V. P. H. Hu and M. Kobayashi
Appl. Phys. Lett.
2022-06
期刊論文
Efficient Erase Operation by GIDL Current for 3D Structure FeFET with Gate Stack Engineering and Compact Long-term Retention Model
F. Mo, J. Xiang, X. Mei, Y. Sawabe, T. Saraya, T. Hiramoto, C. J. Su, V. P. H. Hu, and M. Kobayashi
IEEE J. Electron Device Society
2022-01
期刊論文
Enhancement of Ferroelectricity in 5 nm Metal-Ferroelectric-Insulator Technologies by Using a Strained TiN Electrode
C. H. Wu, K. C. Wang, Y. Y. Wang, C. Hu, C. J. Su*, and T. L. Wu
Nanomaterials
2021-10
期刊論文
Study on the Roles of Charge Trapping and Fixed Charge on Subthreshold Characteristics of FeFETs
C. Jin, C. J. Su, Y. J. Lee, P. J. Sung and M. Kobayashi
IEEE Trans. Electron Device
2021-08
期刊論文
Impacts of Surface Nitridation on Crystalline Ferroelectric Phase of Hf1-xZrxO2 and Ferroelectric FET Performance
Y. J. Lin, C. Y. Teng, C. Hu, C. J. Su* and Y. C. Tseng
Appl. Phys. Lett.
2020-12
研討會論文
3D Integration of Vertical-Stacking of MoS2 and Si CMOS Featuring Embedded 2T1R Configuration Demonstrated on Full Wafers
C. J. Su, M. K. Huang, K. S. Lee, V. P. H. Hu, Y. F. Huang, B. C. Zheng, C. H. Yao, N. C. Lin, K. H. Kao, T. C. Hong, P. J. Sung, C. T. Wu, T. Y. Yu, K. L. Lin, Y. C. Tseng, C. L. Lin, Y. J. Lee, T. S. Chao, J. Y. Li, W. F. Wu, J. M. Shieh, Y. H. Wang and W. K. Yeh
2020-12
研討會論文
First Demonstration of heterogenous Complementary FETs utilizing Low-Temperature (200 °C) Hetero-Layers Bonding Technique (LT-HBT)
T. Z. Hong, W. H. Chang, A. Agarwal, Y. T. Huang, C. Y. Yang, T. Y. Chu, H. Y. Chao, Y. Chuang, S. T. Chung, J. H. Lin, S. M. Luo, C. J. Tsai, M. J. Li, X. R. Yu, N. C. Lin, T. C. Cho, P. J. Sung, C. J. Su, G. L. Luo, F. K. Hsueh, K. L. Lin, H. Ishii, T. Irisawa, T. Maeda, C. T. Wu, W. C. Y. Ma, D. D. Lu, K. H. Kao, Y. J. Lee, H. J. H. Chen, C. L. Lin, R. W. Chuang, K. P. Huang, S. Samukawa, Y. M. Li, J. H. Tarng, T. S. Chao, M. Miura, G. W. Huang, W. F. Wu, J. Y. Li, J. M. Shieh, Y. H. Wang and W. K. Yeh
2020-09
期刊論文
Subthreshold Swing Saturation of Nanoscale MOSFETs Due to Source-to-Drain Tunneling at Cryogenic Temperatures
K. H. Kao, T. R. Wu, H. L. Chen, W. J. Lee, N. Y. Chen, W. C. Y. Ma, C. J. Su, and Y. J. Lee
IEEE Electron Device Lett.
2020-07
期刊論文
Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET Inverters
P. J. Sung, S. W. Chang, C. J. Su, T. C. Cho, F. K. Hsueh, W. H. Lee, Y. J. Lee, and T. S Chao
IEEE Trans. Electron Device
2020-07
期刊論文
Impact of Asymmetrical Source/Drain Offsets on the Operation of Dual-gated Poly-Si Junctionless Nanowire Transistors
Y. T. Chang, R. J. Wu, K. P. Peng, C. J. Su, P. W. Li, and H. C. Lin
Vacuum
2020-06
期刊論文
Role of Electrode-induced Oxygen Vacancies in Regulating Ferroelectric Wake-up in TiN/Hf0.5Zr0.5O2 Capacitors
Y. J. Lin, C. Y. Teng, S. J. Chang, Y. F. Liao, C. Hu, C. J. Su*, and Y. C. Tseng
Appl. Surf. Sci.
2020-06
研討會論文
Characteristics of Dual-gated Poly-Si Junctionless Nanowire Transistors with Asymmetrical Source/drain Offsets
Y. T. Chang, R. J. Wu, K. P. Peng, C. J. Su, P. W. Li, H. C. Lin
2020-06
研討會論文
Process and Structure Considerations for the Post FinFET Era
C. J. Su*, P. J. Sung, K. H. Kao, Y. J. Lee, W. F. Wu, and W. K. Yeh
2020-06
研討會論文
Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K
S. De, Md. Aftab Baig, B. H. Qiu, D. Lu, P. J. Sung, F. K. Hsueh, Y. J. Lee, C. J. Su
2020-05
研討會論文
Dependency of Gate Length and Gate Bias on Sub-threshold Slope and VTH Hysteresis in Hafnium Zirconium Oxide Ferroelectric FETs
T. M. Nguyen, C. H. Wu, C. J. Su*, T. L. Wu
2020-05
研討會論文
Effects of Microwave Annealing on MoS2 FETs
M. K. Huang, N. C. Lin, Y. J. Lee, C. J. Su*, Y. H. Wang
2020-05
研討會論文
Investigation of High-κ Dielectric and Interface Layers on Ge FinFETs CMOS Inverter
T. Y. Chu, C. H. Ro, H. Y. Chao, C. J. Su, K. H. Kao, Y. J. Lee
2020-05
研討會論文
N-type Doping of MoS2 Enabling by Hydrogen Bromide Plasma Technique
K. S. Lee, C. J. Su*, Y. C. Tseng
2020-04
期刊論文
A novel photoresist-based film-profile engineering scheme for fabricating double-gated, recess-channel IGZO thin-film transistors
Y. A. Huang, K. P. Peng, Y. C. Meng, C. J. Su, P. W. Li, H. C. Lin
Jpn. J. Appl. Phys.
2020-04
期刊論文
Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter
P. J. Sung, C. J. Su, S. H. Lo, F. K. Hsueh, D. D. Lu, Y. J. Lee, and T. S. Chao
IEEE J. Electron Device Society
2020-04
期刊論文
Impact of the Polarization on Time-Dependent Dielectric Breakdown in Ferroelectric Hf0.5Zr0.5O2 on Ge Substrates
T. H. Yang, C. J. Su*, Y. S. Wang, K. H. Kao, Y. J. Lee, T. L. Wu
Jpn. J. Appl. Phys.
2020-04
期刊論文
Improved TDDB Reliability and Interface States in 5-nm Hf0.5Zr0.5O2 Ferroelectric Technologies using NH3 Plasma Treatment and Microwave Annealing
Y. H. Chen, C. J. Su*, T. H. Yang, C. Hu, and T. L. Wu
IEEE Trans. Electron Device
2020-04
期刊論文
Nonvolatile Molecular Memory with the Multilevel States Based on MoS2 Nanochannel Field Effect Transistor Through Tuning Gate Voltage to Control Molecular Configurations
Y. W. Lan, C. J. Hong, P. C. Chen, Y. Y. Lin, C. H. Yang, C. J. Chu, M. Y. Li, L .J. Li, C. J. Su, B. W. Wu, T. H. Hou, K. S. Li, and Y. L. Zhong
Nanotechnology
2020-04
期刊論文
Study on Random Telegraph Noise of High-κ/Metal-Gate Gate-All-Around Poly-Si Nanowire Transistors
Y. T. Chang, Y. L. Tsai, K. P. Peng, C. J. Su, P. W. Li, H. C. Lin
Jpn. J. Appl. Phys.
2020-04
期刊論文
Trapping Depth and Transition Probability of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor
Y. T. Chang, , Y. L. Tsai, K. P. Peng, C. J. Su, P. W. Li, and H. C. Lin
IEEE Trans. Nanotechnology
2019-12
研討會論文
First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications
S. W. Chang, P. J. Sung, T. Y. Chu, D. D. Lu, C. J. Wang, N. C. Lin, C. J. Su, S. H. Lo, H. F. Huang, J. H. Li, M. K. Huang, Y. C. Huang, S. T. Huang, H. C. Wang, Y. J. Huang, J. Y. Wang, L. W Yu, Y. F. Huang, F. K. Hsueh, C. T. Wu, W. C. Y. Ma, K. H. Kao, Y. J. Lee, C. L. Lin, R. W. Chuang, K. P. Huang, S. Samukawa, Y. Li, W. H. Lee, T. S. Chao, G. W. Huang, W. F. Wu, J. Y. Li, J. M. Shieh, W. K. Yeh, Y. H. Wang
2019-09
研討會論文
New Contact-first Two-dimensional Transistor
Y. W. Kang, C. J. Su*, T. H. Hou
2019-09
研討會論文
Polarization Dependency of Time-Dependent Dielectric Breakdown (TDDB) Characteristics in Ferroelectric HfZrOx
T. H. Yang, C. J. Su*, Y. S. Wang, K. H. Kao, Y. J. Lee, T. L. Wu
2019-06
研討會論文
A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs
Y. T. Tang, C. L. Fan, Y. C. Kao, N. Modolo, C. J. Su, T. L. Wu, K. H. Kao, P. J. Wu, S. W. Hsiao, A. Useinov, Pin Su, W. F. Wu, G. W. Huang, J. M. Shieh, W. K. Yeh, and Y. H. Wang
2019-06
研討會論文
Ge n-GAAFETs by Neutral Beam Etching and Selective Wet Etching Processes
T. C. Hong, F. K. Hsueh, P. J. Sung, N. C. Lin, C. J. Su, Y. J. Lee, T. S. Chao, S. Samukawa
2019-06
研討會論文
Split-Gate FeFET (SG-FeFET) with Dynamic Memory Window Modulation for Non-Volatile Memory and Neuromorphic Applications
V. P. H. Hu, H. H. Lin, Z. A. Zheng, Z. T. Lin, Y. C. Lu, T. Y. Ho, Y. W. Lee, C. W. Su and C. J. Su
2019-06
研討會論文
Study of Germanium Nanosheet Channel with Negative Capacitance Field-Effect-Transistor
Y. N. Chen, F. J. Hou, C. J. Su, and Y. C. Wu
2019-04
期刊論文
Local Modulation of Electrical Transport in 2D Layered Materials Induced by Electron Beam Irradiation
C. P. Lin, P. C. Chen, J. H. Huang, C. T. Lin, D. Wang, W. T. Lin, C. C. Cheng, C. J. Su, Y. W. Lan, and T. H. Hou
ACS Applied Electronic Materials
2019-04
研討會論文
Analysis of Capacitance-Voltage Characteristics in Ferroelectric HfZrOx MOSCAPs with Different Annealing Temperatures
Y. H. Chen, C. J. Su, C. Hu, T. L. Wu
2019-04
研討會論文
Enhanced Performance of Single-layer MoS2 Devices by Contact-first Technique
Y. W. Kang, C. J. Su*, T. H. Hou
2019-04
研討會論文
Fabrication of Ω-gated Negative Capacitance FinFETs and SRAM
P. J. Sung, C. J. Su, Y. J. Lee, D. D. Lu, S. X. Luo, K. H. Kao, J. Y. Ciou, C. W. Wang, S. De, C. Y. Jao, H. S. Hsu, C. J. Wang, T. C. Hong, C. Y. Chang, T. H. Liao, C. C. Fang, Y. S. Wang, H. F. Huang, J. H. Li, Y. C. Huang, F. K. Hsueh, C. T. Wu, F. J. Hou, G. L. Luo, Y. C. Huang, Y. L. Shen, W. C. Y. Ma, K. P. Huang, K. L. Lin , G. W. Huang, T. S. Chao, J. Y. Li, W. F. Wu, J. M. Shieh, W. K. Yeh, Y. H. Wang
2019-04
研討會論文
Growth of Large Area MoS2 Film by Water-assisted CVD
M. K. Huang, C. J. Su*, Y. J. Lee, Y. H. Wang
2019-04
研討會論文
Impacts of NH3 Plasma Treatment on Metal-Insulator-Semiconductors with HfZrO2 Thin Films
Y. J. Lin, C. J. Su*, Y. C. Tseng
2019-04
研討會論文
Stability of Ferroelectric HfZrOx MOSCAPs under Constant Voltage Stresses
T. H. Yang, C. J. Su, C. Hu, T. L. Wu
2019-04
研討會論文
Study of Germanium Nanosheet Channel with Negative Capacitance Field-Effect-Transistor
Y. N. Chen, Y. C. Wu, F. J. Hou, C. J. Su
2019-04
研討會論文
The Studies of Band offsets measured of HfZrO thin film by XPS
T. Y. Yu, C. J. Su, K. L. Lin
2019-03
期刊論文
Effects of Annealing on Ferroelectric Hafnium Zirconium Oxide-Based Transistor Technology
Y. H. Chen, C. J. Su, C. Hu, and T. L. Wu
IEEE Electron Device Lett.
2018-12
研討會論文
Impact of the annealing temperature on C-V characteristics of Ferroelectric HfZrOx on a p-type Si substrate
Y. H. Chen, C. J. Su, C. Hu, and T. L. Wu
2018-12
研討會論文
Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications
P. J. Sung, C. Y. Chang, L. Y. Chen, K. H. Kao, C. J. Su, T. H. Liao, C. C. Fang, C. J. Wang, T. C. Hong, C. Y. Jao, H. S. Hsu, S. X. Luo, Y. S. Wang, H. F. Huang, J. H. Li, Y. C. Huang, F. K.Hsueh, C. T. Wu, Y. M. Huang, F. J. Hou, G. L. Luo, Y. C. Huang, Y. L. Shen, W. C. Y. Ma, K. P. Huang, K. L. Lin, S. Samukawa, Y. Li, G. W Huang, Y. J. Lee, J. Y. Li, W. F. Wu, J. M. Shieh, T. S. Chao, W. K. Yeh, and Y. H. Wang
2018-11
期刊論文
Ge FinFET CMOS Inverters with Improved Channel Surface Roughness by Using In-Situ ALD Digital O3 Treatment
M. S. Yeh, G. L. Luo, F. J. Hou, P. J. Sung, C. J. Wang, C. J. Su, C. T. Wu, Y. C. Huang, T. C. Hong, T. S. Chao, B. Y. Chen, K. M. Chen, Y. C. Wu, M. Izawa, M. Miura, M. Morimoto, H. Ishimura, Y. J. Lee, W. F. Wu, and W. K. Yeh
J. Electron Devices Society
2018-10
期刊論文
Effective N-methyl-2-pyrrolidone wet cleaning for fabricating high performance monolayer MoS2 transistors
P. C. Chen, C. P. Lin, C. J. Hong, C. H. Yang, Y. Y. Lin, M. Y. Li, L. J. Li, T. Y. Yu, C. J. Su, K. S. Li, Y. L. Zhong, T. H. Hou, and Y. W. Lan
Nano Research
2018-10
研討會論文
A study of scanning capacitance microscopy and spectroscopy on HfO2-based ferroelectric materials
M. N. Chang, C. J. Su, H. Y. Kao, C. T. Wu, Y. S. Wang, K. H. Kao, and Y. J. Lee
2018-09
研討會論文
A Novel Experimental Approach to Extracting Negative Capacitances: Newly found Negative DIBL Effect in 14nm NC-FinFET and the Way to Achieve Hysteresis-free
Y. C. Luo, E. R. Hsieh, C. J. Su, S. Chung, T. P. Chen, S. A. Huang, T. J. Chen, O. Cheng
2018-09
研討會論文
A study of photoreaction surface treatment on 2D MoS2 and Bi2Se3 materials
C. C. Huang, C. J. Su, and Y. N. Wang
2018-06
研討會論文
A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node
Y. T. Tang, C. J. Su*, Y. S. Wang, K. H. Kao, T. L. Wu, P. J. Sung, F. J. Hou, C. J. Wang, M. S. Yeh, Y. J. Lee, W. F. Wu, G. W. Huang, J. M. Shieh, W. K. Yeh, and Y. H. Wang
2018-04
研討會論文
Ferroelectric Effects of Metal-Insulator-Metal and Metal-Insulator-Semiconductor Ge MOSCAPs
Y. S. Wang, C. J. Su*, Y. J. Lee, K. H. Kao
2018-04
研討會論文
Integration of monolayer MoS2 on 3D FinFETs
C. J. Hong, Y. L. Zhong, P. C. Chen, Y. W. Lan, C. J. Su, K. S. Li, and L. J. Li
2018-03
研討會論文
Ge FinFET CMOS Inverters with Improved Channel Surface Roughness by Using In-situ ALD Digital O3 Treatment
M. S. Yeh, G. L. Luo, F. J. Hou, P. J. Sung, C. J. Wang, C. J. Su, C. T. Wu, Y. C. Huang, T. C. Hong, T. S. Chao, B. Y. Chen, K. M. Chen, M. Izawa, M. Miura, M. Morimoto, H. Ishimura, Y. J. Lee, W. F. Wu, and W. K. Yeh
M. Si, C. J. Su, C. Jiang, N. Conrad, H. Zhou, K. Maize, G. Qiu, C. T. Wu, A. Shakouri, M. Alam, and P. D. Ye
Nature Nanotechnology
2018-01
技術報告
3C電子產品不可缺的靈魂技術-浮閘記憶體
蘇俊榮
2017-12
研討會論文
Ge Nanowire FETs with HfZrOx Ferroelectric Gate Stack Exhibiting SS of Sub-60 mV/dec and Biasing Effects on Ferroelectric Reliability
C. J. Su, T. C. Hong, Y. C. Tsou, F. J. Hou, P. J. Sung, M. S. Yeh, C. C. Wan, K. H. Kao, Y. T. Tang, C. H. Chiu, C. J. Wang, S. T. Chung, T. Y. You, Y. C. Huang, C. T. Wu, K. L. Lin, G. L. Luo, K. P. Huang, Y. J. Lee, T. S. Chao, W. F. Wu, G. W. Huang, J. M. Shieh, W. K. Yeh, and Y. H. Wang
2017-12
研討會論文
Steep-slope MoS2 Negative Capacitance Field-effect Transistor without Hysteresis
M. Si, C. J. Su, and P. D. Ye
2017-12
研討會論文
Sub-60 mV/dec Ferroelectric HZO MoS2 Negative Capacitance Field-effect Transistor with Internal Metal Gate: the Role of Parasitic Capacitance
M. Si, C. Jiang, C. J. Su, Y. T. Tang, L. Yang, W. Chung, M. A. Alam, P. D. Ye
2017-10
期刊論文
Effect of two-step metal organic chemical vapor deposition growth on quality, diameter and density of InAs nanowires on Si (111) substrate
H. W. Yu, D. Anandan, C. Y. Hsu, Y. C. Hung, C. J. Su, C. T. Wu, R. K. Kakkerla, M. T. H. Ha, S. H. Huynh, Y. Y. Tu, E. Y. Chang
Journal of Electronic Materials
2017-06
研討會論文
Nano-scaled Ge FinFETs with Low Temperature Ferroelectric HfZrOx on Specific Interfacial Layers Exhibiting 65% S.S. Reduction and Improved ION
Al2O3 Grown on Si with In-situ Pretreatment by Atomic-layer Deposition
Chun-Jung Su, Ying-Tsan Tang, Chia-Chen Wan and Yung-Sheng Fang
2015-10
技術報告
小小的奈米線大大的應用
蘇俊榮
2015-09
研討會論文
Fabrication and Characteristics of InGaAs FinFETs with Different Fin Width and Gate Length
C. C. Chen, C. J. Su, S. H. Chen, A. J. Tzou, and H. C. Kuo
2012-11
期刊論文
Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization
C. J. Su*, Y. F. Huang, H. C. Lin, and T. Y. Huang
Solid-State Electronics
2012-11
期刊論文
Low-operating-voltage ultra-thin junctionless poly-Si thin-film transistor technology for RF applications
T. I. Tsai, K. M. Chen, H. C. Lin, T. Y. Lin, C. J. Su, T. S. Chao, and T. Y. Huang
IEEE Electron Device Letters
2012-11
研討會論文
Junctionless transistors with three dimensional stacks of heavily doped polysilicon nanowire channels
T. I. Tsai, C. J. Su, H. C. Lin, T. S. Chao, and T. Y. Huang
2012-11
研討會論文
The effects of doping concentration and gate configuration on junctionless poly-Si nanowire SONOS memory devices
C. J. Su*, T. K. Su, T. I. Tsai, B. S. Shie, H. C. Lin, and T. Y. Huang
2012-06
期刊論文
Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique
C. J. Su, T. I. Tsai, H. C. Lin, T. Y. Huang, and T. S. Chao
Nanoscale Research Letters
2012-02
期刊論文
A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowire
C. J. Su, T. K. Su, T. I. Tsai, H. C. Lin, and T. Y. Huang
Nanoscale Research Letters
2011-11
研討會論文
Fabrication and characterization of high-κ materials applied to poly-Si nanowire nonvolatile memory devices
T. K. Su, C. J. Su*, H. C. Lin, and T. Y. Huang
2011-09
期刊論文
原子層沉積技術與應用
蘇俊榮
電子月刊
2011-06
研討會論文
Analyses of the influences of layout and process modifications on thin-film transistors with metal-induced lateral crystallized poly-Si nanowire channels
C. J. Su*, Y. F. Huang, H. C. Lin, and T. Y. Huang
2011-06
研討會論文
Fabrication and characterization of a junctionless SONOS transistor with poly-Si nanowire channels
T. K. Su, T. I. Tsai, C. J. Su, H. C. Lin, and T. Y. Huang
2011-06
研討會論文
Fabrication and characterization of junctionless poly-Si nanowire devices with gate-all-around structure
C. J. Su*, Y. L. Liou, T. I. Tsai, H. C. Lin, and T. Y. Huang
2011-06
研討會論文
High-κ dielectrics deposited by thermal/remote plasma ALD with different post-metal annealing for nonvolatile memory application
M. C. Lin, C. C. Liao, T. Y. Chiang, C. J. Su, and T. S. Chao
2011-06
研討會論文
Low temperature polycrystalline Si nanowire devices with gate-all-around Al2O3/TiN structure using an implant-free technique
T. I. Tsai, C. J. Su, T. S. Chao, H. C. Lin, and T. Y. Huang
2011-04
期刊論文
Gate-all-around Junctionless Transistors with Heavily Doped Polysilicon Nanowire Channels
Impacts of multiple-gated configuration on the characteristics of poly-Si nanowire SONOS devices
Hsing-Hui Hsu, Horng-Chih Lin, Cheng-Wei Luo, Chun-Jung Su, and Tiao-Yuan Huang
IEEE Transactions on Electron Devices
2010-11
期刊論文
Effect of Ni residues on the performance and the uniformity of nickel-induced lateral crystallization polycrystalline silicon nanowire thin-film transistors
B. M. Wang, T. M. Yang, Y. C. S. Wu, C. J. Su, H. C. Lin
Materials Chemistry and Physics
2010-10
研討會論文
Improved performance of NILC poly-Si nanowire TFTs by using Ni-gettering
B. M. Wang, T. M. Yang, Y. C. Sermon Wu, C. J. Su and H. C. Lin
2010-05
期刊論文
Operation of a Novel Device With Suspended Nanowire Channels
Horng-Chih Lin, Chia-Hao Kuo, Guan-Jang Li, Chun-Jung Su, Tiao-Yuan Huang
IEEE Electron Devices Letters
2010-04
研討會論文
Impacts of Multiple-Gate Configuration on Characteristics of Poly-Si Nanowire SONOS Devices
Hsing-Hui Hsu, Shuan-Yun Huang, Chun-Jung Su, Horng-Chih Lin, Tiao-Yuan Huang
2010---
期刊論文
Improved performance of NILC poly-Si nanowire TFTs by using Ni-gettering
B. M. Wang, T. M. Yang, Y. C. Sermon Wu, C. J. Su and H. C. Lin
ECS Transactions
2009-01
期刊論文
Novel poly-silicon nanowire field effect transistor for biosensing application
C. Y. Hsiao, C. H. Lin, C. H. Hung, C. J. Su, Y. R. Lo, C. C. Lee, H. C. Lin, F. H. Ko, T. Y. Huang
Biosensors and Bioelectronics
2008-12
期刊論文
Ultrasensitive detection of dopamine using a polysilicon nanowire field-effect transistor
C. H. Lin, C. Y. Hsiao, C. H. Hung, Y. R. Lo, C. C. Lee, C. J. Su, H. C. Lin, F. H. Ko, T. Y. Huang
Chemical Communications
2008-07
期刊論文
A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gate